A dot product multiplies corresponding elements and adds the products. Start with ordinary Ada, then express four products as one explicit vector block.
Start with one pair per source iteration
Result : F32 := 0.0;
for Index in Left'Range loop
Result := Result + Left (Index) * Right (Index);
end loop;
Each source iteration reads, multiplies, and adds one pair. GNAT can auto-vectorize this loop, so source structure does not determine the emitted instructions.
Read the lane shape from the type name
A F32x4 value contains four F32 lanes. Each lane is an IEEE binary32 value. Four 32-bit lanes make one 128-bit vector.
The integer families use the same naming rule. For example, U8x16 has 16 unsigned byte lanes, and I64x2 has two signed 64-bit lanes.
All ten v0.1 value types are 128 bits wide. The operation reference lists their corresponding private mask types.
Compute the first four products
Backends.Native supplies operations for the backend selected by the build. The arrays contain at least four valid elements for these full loads.
Left_Block : constant F32x4 :=
Native.Load_Unaligned (Left, Left'First);
Right_Block : constant F32x4 :=
Native.Load_Unaligned (Right, Right'First);
Products : constant F32x4 :=
Native.Multiply (Left_Block, Right_Block);
Load_Unaligned reads four binary32 elements. Multiply multiplies corresponding lanes.
For the maintained input, the blocks are [1.0, 2.0, 3.0, 4.0] and [0.5, 1.0, 1.5, 2.0]. The product lanes are [0.5, 2.0, 4.5, 8.0].
Map lane 0 to the first loaded element
Lane 0 contains Left (Left'First). Lane 1 contains the next element. This logical order is identical on every backend and does not depend on machine endianness.
Lane-wise operations preserve positions unless their name documents a permutation. A multiplication never combines one lane with another lane.
Use operations instead of representation
Value and mask types are private. Applications can construct, load, store, extract, replace, compare, and combine them through public operations.
The library does not promise a portable record layout, register layout, or calling convention. Compiler switches and target instruction sets can change those mechanisms.